Phase locked loops and delay locked loops find wide applications in many systems, such as for example, in a microprocessor for buffering and distributing a clock signal, or in a memory controller for proper timing of signals needed to read data from system memory. To save power, it is desirable to power down a phase locked loop or a delay locked loop when they are not needed. However, when powered up, these circuits need to acquire lock again to perform their function. Consequently, in many mobile products for which long battery life is important, it is desirable for phase locked loops and delay locked loops to quickly achieve lock.